CHIPHEAD
Gateslinger: Someone who throws tiny transistors (gates) around on silicon
to make a chip.
I'm an Electronics Engineer, specializing in ASIC designs. I've worked for various companies such as Sun Microsystems, Amdahl, VLSI Technology (now a part of Philips), Cirrus Logic, Intel, Corrent, and Microchip Technology. I have several patents in various areas of communications, digital signal processing, PC architecture, and encryption. My work experience has covered products such as PDAs, PCs, unix-based workstations and mainframes, and network encryption devices.
I've gathered some of my papers I've submitted to conferences, publications, and sample/demo code.
Synopsys Users Group Papers
 | Blazing Saddles: Getting the Performance Out Of VCS, San Jose SNUG 2003. Presentation slides. |
| Tcl: The Good, The Bad,
and The Ugly, Boston SNUG 2000. Presentation slides. |
| Tcl Synthesis Environment,
Boston SNUG 2000. Presentation slides. Sample code. I had a large hand in creating this. Tim Wilson & Rodney Pesavento presented the paper. |
| Testbenches: The Dark Side of IP Reuse, San Jose SNUG
2000. Presentation slides. |
| Verilog Bus Functional Models for
Verification, San Jose SNUG 1999. Presentation slides. Sample code. Rodney Pesavento wrote this excellent paper on task-based BFM modeling. |
| VHDL Bus Functional Models for
Verification, San Jose SNUG 1999. Presentation slides. Sample code. |
Useful items
| Verilog Reference |
| VHDL Reference |
| VHDL 1164 Package Reference |